Problems fixed in EASE 8.3 Revision 7, January 20, 2017

1859 Library meta data incorrect after library import 8.3.7 During restore the meta data for the managed libraries was not restored.
1844 Diagram generic line and fill color cannot be set 8.3.7 Line and fill color were set on owning entity generic instead of the diagram generic itself
1841 Connection properties dialog no longer shows net name in Port map column 8.3.7 Resulting connection is not shown if the default settings were changed.
1835 Browser window empty after adding and deleting a VHDL block 8.3.7 If you add a VHDL block and immediately delete it again the browser will be completely blank.
1834 Unsaved changed lost after updating workspace 8.3.7 When updating a workspace (for the project or a managed library) Ease does not ask to save changes. These changes will be lost when the project is reloaded after the VCM action.
1819 Duplicate file path messages for process HDL files 8.3.7
1811 HDL import problem with rippers 8.3.7 Ripper is connected incorrect
1804 HDL Parseres fail on `protected encoding type 8.3.6 `protect encoding= ( enctype="base64", line_length= 76, bytes= 256 ) fails on the extra spaces around the parenthesis
1802 After pushing down a number of components to a new diagram nothing is visible in the new diagram 8.3.6 In the new diagram nothing will be visible as the objects are placed outside the sheet.
1793 Qt Gui error shown when loading a project 8.3.6 When a project is open and modified is the gui version of EASE and also loaded with the command line version a Qt error message is shown and the application terminates.
1788 Multiline values not properly shown in the property sheets 8.3.6 Row is not resized according to multli-line contents.
1790 VHDL linter false positive (Misc2: latch detected) 8.3.5 Fixed a false positive
1789 SS16 lint check should also test entity ports 8.3.5 The DO-254 SS16 lint check should also apply to entity ports.
1784 Scripting or automation when moving from file to svn protocol 8.3.5 Added svn_url_remap.xml to automatically remap protocols or server names
1780 New project gets 'Project info' from defaults settings instead of 'Designer' 8.3.5 When specifying the 'Designer' name in the 'Object defaults' dialog (Project page) and creating a new project, the value specified in the 'Designer' field will end up in the 'Project info' field in the project properties.
1778 External documents not copied when importing a library 8.3.5 As title
1775 Should not be able to start creating a new virtual record when virtual package is read-only 8.3.5 The context entry should be disabled for readonly packages
1773 Crash on incorrect VHDL type declaration 8.3.5 A recursive VHDL type defintion would crash the VHDL parser
1767 Library statements generated for direct instantiation lead to CP14 lint messages 8.3.5 When using direct instantiations Ease will generate a library clause for the library containing the direct instantiations. This library clause is generated before the start of the architecture, but should not be generated if there is already a library clause generated before the entity.
1766 Free placed text cannot be aligned 8.3.5 The alignment buttons are not enabled for free placed text.
1764 Duplicate entries in picklists 8.3.4 When adding constant value tags to component ports using alternating values, lots of duplicates can be shown in the picklist (combo box).
1762 It should not be necessary to synchronize components after changing comment for entity port/generic 8.3.4 When changing only the comment for an entity port (or entity generic) it is necessary to synchronize all instantiations. In a version managed project this is not very convenient.
1761 Replace route by tags & replace tags by route do not work when connected to destination ripper 8.3.4 The command is ignored.
1760 Unnecessary errors when using bus rippers 8.3.4 New nodes are not added.
1758 Single net dialog doesn't allow changing name case 8.3.4 You cannot change only the netname casing in the single net dialog.
1755 Add extra information when copying verify/lint messages to the clipboard 8.3.4 When pasting the messages it is not possible to tell if they are notes, warnings or errors.
1754 Improve moving a wires with rippers 8.3.4 Previous nodes are not removed
1743 Buttonbar context menu appears after performing a checkin action 8.3.3 A VCM action triggered from a component context menu can result in the context menu of the button bar to appear.
1739 No code generated for variable declaration in FSM diagram 8.3.3 When adding an HDL declaration of type Variable in an FSM diagram, no variable declaration will be generated.
1737 Automatic sensitivity list can set in 2 dialogs for an FSM 8.3.3 The automatic sensitivity property of an FSM process can be set both in the Process property dialog and in the Fsm property dialog. The Process property is however ignored.
1731 Each new instantiation of an entity also adds a USE clause 8.3.3 When the entity that uses virtual records is instantiated in another library a new use clause is add to the parent entity.
1728 VHDL 2008 package instantiation results in error 8.3.3 Results in VHDL-1353 error, but is correct
1727 Crash on VHDL with syntax error (missing semicolon) 8.3.3 Certain missing semicolons in a VHDL package can cause the parser to crash.
  Aldec ActiveHDL 8.3.3 Added TCL tool interface for ActiveHDL
1726 Changing a bit_vector type into bit in the entity property dialog disables the range cell 8.3.2 The present range gets disabled but is not removed when closing the dialog.
1725 Changing label orientation of certain labels, moves the label to strange position 8.3.2 Happens with component, ripper and terminal port labels.
1724 Cannot open property dialog for objects in diagram editor using Alt+Enter in read only diagrams 8.3.2 As Title
1723 No local signal created for part of net with virtual record type 8.3.2 Required local signal is not created.
1721 Object/text search does not find search results for actions on transitions 8.3.2 Search results show actions on states and HDL text inside these actions, but no actions on transitions and HDL text inside these actions.
1715 Project lint settings ignored by linter 8.3.2 Lint settings in the project properties are ignored. Linter will always use the default settings.
1714 Toplevel marker not visible in browser 8.3.2 It is however possible to change the marker and all related commands (Verify from marker, ...) will work.
1712 Copy and paste incorrect in property tables for cells that accept multiline text 8.3.1 When performing a paste and the cell accepts multiline values, the whole paste string is place in the cell.
1711 Ctrl+T does not refresh browser when inside a detached editor window 8.3.1 Ctrl+T does not work from a detached editor. It works fine when the editor is not detached.
1708 Postscript printer driver does not handle images with transparent background correctly. 8.3.1 When an Ease diagram contains an image with a transparent background, the background shows up in black when printing to a Postscript printer..
1702 'Replace Route by Tags' doesn't work for an unrouted net. 8.3.1 A least one route should be present.
1686 Add VCM entries in context menu for unmanaged library in managed project 8.3.1 The VCM action present in the context menu for a managed library should also be present for an unmanaged library in a managed project (e.g. Update Workspace).
1685 VCM status verification report shows 0 notes, but there are icons in the browser 8.3.1 When performing VCM status verification for a managed library the report sometimes shows "0 notes" while there should be messages about entities that need to be updated and the appropriate icons are visible in the browser.
1675 Toolproject files selected through the TCL interface were stored as a property on an EASE project. 8.3.1 Store this info in the toolflow, eg user specific like the rest of the toolflow.
1672 Shortcuts for net highlighting 8.3.1 ha: clear all net highlighting
hc: clear highlighting for selected nets
hh: hierarchical highlighting for all selected nets
hs: single (non hierarchical) highlighting for all selected nets
hx: clear hierarchical highlighting for all selected nets
1669 Support for Virtual record copy 8.3.1 As Title
1666 Virtual package can not be moved to another library using drag & drop. 8.3.1 Library did not accept a virtual package.
1664 Testbench skeleton generator 8.3.1 Generics created for testbench skeletons were not placed correctly
1654 It is not possible to use VHDL-2008 specific packages if a project is in VHDL-93 mode 8.2.6 An option in the corporate or user settings will force EASE to use the VHDL-2008 package if there is a library in VHDL-2008 mode. Due to a change of the 'std_logic_vector' definition in the VHDL-2008 package this fix could also introduce verification errors.
1636 Filter on verification and lint messages 8.3.1 It is not currently possible to filter lint/verification messages. In some cases there are lots of warnings, but only 1 or 2 errors. In these cases it would be nice to be able to filter the messages.
1632 Allow VCM status verification for entire (unmanaged) project 8.3.1 Currently it is not possible to perform VCM status verification on an entire project if the project is not VCM managed. This is not convenient when the project contains lots of managed libraries.
1631 Use different icons for different kind of messages in VCM status verification report 8.3.1 All messages in the VCM status report use the same icon (blue dot). It would be nice if the different message types would use different icons so it is easier to spot them.
1624 Entity generic/port property sheet will now disable the range cell if the type does not support a range 8.3.1
1623 Signal properties should use separate combo boxes for type and range 8.3.1 The range constraint of a type is no longer attached to the type field. The range field is now a combo box with the used constraints in the diagram.
1622 Copying a generic should show the generic dialog 8.3.1 When copying a generic using CTRL + drag & drop we should show the generic properties dialog instead of dialog for the name of the new generic (same as when copying ports).
1612 User option to specify default designer name for new projects & libraries 8.3.1 Customer has to specify the designer manually for each new project and library.
1610 Shortcuts for Verify and Lint 8.3.1 Added following shortcuts in browser:
  • Ctrl+G: generate HDL output for selected object
  • Ctrl+L: lint selected object
  • Ctrl+U: update HDL output for selected object
  • Ctrl+F11: verify selected object
Added following shortcuts in editor:
  • Ctrl+G: generate HDL output for current architecture/module
  • Ctrl+L: lint current architecture/module
  • Ctrl+F11: verify current architecture/module
Added following global shortcuts:
  • Ctrl+Shift+G: generate all HDL output starting from marker
  • Ctrl+Shift+L: lint from HDL output marker
  • Ctrl+Shift+U: update all HDL output starting from marker
  • Ctrl+Shift+F11: verify from HDL output marker
1594 Allows tags in the testbench skeleton 8.3.1 The testbench skeleton always uses wires to connect the ports. With a large entity it is more useful to tags to connect the ports.
1579 Simple way to create object id for an library/entity 8.3.1 When you import a library/entity from another project and to use is as start for a new model it needs an new object id. The 'System administration' menu is extended with a 'Reset object identifier' entry.
1565 Incorrect floating rectangle label when moving a non default component label 8.3.1 When selecting or moving a component label, the default label is used instead of the actual one.
1375 VHDL import option to use CBN tag for net with only one connection 8.3.1 Extra option in the import dialog to add a tag instead of a wire stub.
1596 Allow component layout to be different than entity layout 8.3.1 It should be possible to change an component layout (of a read-only entity) so it fits better in the diagram.
1593 Entity verification status 8.3.1 The entity verification status in the database view should indicate problems in the architecture. When the entity is closed in the browser you don't see the architecture issues.
1592 Allow port connect label to be configurable like ripper 8.3.1 To decrease the size of the displayed label it wood be nice to leave out the netname.
1570 Allow to remove netname/port connection by deleting the label 8.3.1 Would be easier to remove port connections and net name by just deleting the label. We already allow this for statemachine conditions.
1380 Net properties dialog enhancements 8.3.1 Added context menu item 'Net properties' to the block diagram canvas to make it possible to edit all nets (both connected using routes and connected using CBN tags !) in one action.
Nets properties dialog now supports changing tags to route and route to tags.
For virtual nets show the port and its direction in the tooltip for the cell containing the name.
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