Attributes (predefined) |
LRM §14.1. |
A value, function, type, range, signal, or constant that may be associated with one or more types, objects, subprograms, etc.
object_name[ signature ]'attribute_name[ ( expression ) ] signature = [ type_name, ... ] return type_name
An attribute gives extra information about a specific part of a VHDL description. Predefined attributes can be contants, functions or signals. In the VHDL standard a set of predefined attributes is defined. Additionally, users can define new attributes. See Attributes (user-defined) for details.
Each type or subtype T has a basic attribute called T'Base, which indicates the base type for type T (Table 1). It should be noted that this attribute could be used only as a prefix for other attributes.
Table 1. Attributes available for all types
| Attribute |
Result |
| T'Base |
base type of T |
Table 2. Attributes of scalar types
| Attribute |
Result type |
Result |
| T'Left |
same as T |
leftmost value of T |
| T'Right |
same as T |
rightmost value of T |
| T'Low |
same as T |
least value in T |
| T'High |
same as T |
greatest value in T |
| T'Ascending |
boolean |
true if T is an ascending range, false otherwise |
| T'Image(x) |
string |
a textual representation of the value x of type T |
| T'Value(s) |
base type of T |
value in T represented by the string s |
Table 3. Attributes of discrete or physical types and subtypes
| Attribute |
Result type |
Result |
| T'Pos(s) |
universal integer |
position number of s in T |
| T'Val(x) |
base type of T |
value at position x in T (x is integer) |
| T'Succ(s) |
base type of T |
value at position one greater than s in T |
| T'Pred(s) |
base type of T |
value at position one less than s in T |
| T'Leftof(s) |
base type of T |
value at position one to the left of s in T |
| T'Rightof(s) |
base type of T |
value at position one to the right of s in T |
Table 4. Attributes of the array type or objects of the array type
| Attribute |
Result |
| A'Left(n) |
leftmost value in index range of dimension n |
| A'Right(n) |
rightmost value in index range of dimension n |
| A'Low(n) |
lower bound of index range of dimension n |
| A'High(n) |
upper bound of index range of dimension n |
| A'Range(n) |
index range of dimension n |
| A'Reverse_range(n) |
reversed index range of dimension n |
| A'Length (n) |
number of values in the n-th index range |
| A'Ascending(n) |
true if index range of dimension n is ascending, false otherwise |
Table 5. Attributes of signals
| Attribute |
Result |
| S'Delayed(t) |
Implicit signal, equivalent to signal S, but delayed t units of time |
| S'Stable(t) |
Implicit signal that has the value true when no event has occurred on S for t time units, false otherwise |
| S'Quiet(t) |
implicit signal that has the value true when no transaction has occurred on S for t time units, false otherwise |
| S'Transaction |
implicit signal of type Bit whose value is changed in each simulation cycle in which a transaction occurs on S (signal S becomes active) |
| S'Event |
true if an event has occurred on S in the current simulation cycle, false otherwise |
| S'Active |
true if a transaction has occurred on S in the current simulation cycle, false otherwise |
| S'Last_event |
the amount of time since last event occurred on S, if no event has yet occurred it returns Time'High |
| S'Last_active |
the amount of time since last transaction occurred on S, if no event has yet occurred it returns Time'High |
| S'Last_value |
the previous value of S before last event occurred on it |
| S'Driving |
true if the process is driving S or every element of a composite S, or false if the current value of the driver for S or any element of S in the process is determined by the null transaction |
| S'Driving_value |
the current value of the driver for S in the process containing the assignment statement to S |
Table 6. Attributes of named entities
| Attribute |
Result |
| E'Simple_name |
a string representing the simple name, character literal or operator symbol defined in the declaration of the item E |
| E'Path_name |
a string describing the path through the design hierarchy, from the root entity or package to the item E |
| E'Instance_name |
a string describing the path through the design hierarchy, from the root entity or package to the item E, but including the names of the entity and architecture bound to each component instance in the path |
Paths which can be written using E'Path_name and E'Instance_name are used for reporting and assertion statements. They allow specifying precisely where warnings or errors are generated.
type T is (low, middle, high); T'Left = low signal S: std_logic_vector(3 downto 0); S'Range = 3 downto 0 S'Length = 4