Back | Index | uart |
Contents | Side Data | Generated HDL |
1 -------------------------------------------------------------------------------- 2 -- Object : Entity uart.uart_tb 3 -- Last modified : Tue Apr 13 15:27:50 2021 4 -------------------------------------------------------------------------------- 5 6 library ieee; 7 use ieee.std_logic_1164.all; 8 use ieee.std_logic_unsigned.all; 9 use ieee.std_logic_arith.all; 10 11 entity uart_tb is 12 generic( 13 dwidth : Natural := 8; 14 Period : time := 50 ns); 15 end entity uart_tb; 16 17