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uart

uart_tb

test

Hierarchy for architecture test of entity uart.uart_tb

    1  --------------------------------------------------------------------------------
    2  -- Object        : Configuration uart.uart_tb.<Internal>
    3  -- Last modified : Tue Apr 13 15:27:50 2021
    4  --------------------------------------------------------------------------------
    5  -- Ease Internal Configuration
    6  
    7  configuration <Internal> of uart_tb is
    8    for test
    9      for u1 : clock_gen
   10        use entity uart.clock_gen(text);
   11      end for;
   12      for u0 : uart
   13        use entity uart.uart(structure);
   14        for structure
   15          for u0 : transmitter
   16            use entity uart.transmitter(structure);
   17            for structure
   18              for u0 : transmit
   19                use entity uart.transmit(fsm);
   20              end for;
   21            end for;
   22          end for;
   23          for u1 : receiver
   24            use entity receiver.receiver(structure);
   25            for structure
   26              for u0 : rec_fsm
   27                use entity receiver.rec_fsm(structure);
   28              end for;
   29              for u1 : edgedet
   30                use entity receiver.edgedet(rtl);
   31              end for;
   32              for u2 : edgedet
   33                use entity receiver.edgedet(rtl);
   34              end for;
   35            end for;
   36          end for;
   37          for u2 : cntrl
   38            use entity uart.cntrl(rtl);
   39          end for;
   40        end for;
   41      end for;
   42      for u3 : stim
   43        use entity uart.stim(rtl);
   44      end for;
   45    end for;
   46  end configuration <Internal>;
   47  
   48