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| SPR | Title | Released | Description |
|---|---|---|---|
| 2389 | TraceView sort dialog | 3.3.2 | Sort dialog showed all boards (including adaptions), now limited to the visible boards. |
| 2388 | Tcl interface | 3.3.2 | Support for adaptions. Added arguments id and type to a schematic handle. Improved documentation. |
| Wiring tool | 3.3.2 | Cadence Allegro did not start when CDSROOT was not set. Improved editing of direction and Allegro port columns. Improved documentation. |
|
| Device support | 3.3.1 | Renamed Intel back to Altera and Xilinx to AMD. | |
| 2377 | Multiple virtual boards for the same component | 3.3.1 | A new FPGA / processor can be defined for a component for which already an FPGA or Microprocessor is defined. |
| 2349 | Filter objects from the PCB view | 3.3.1 | Add a page to the PCB properties dialog to exclude or include units in the PCB view. |
| 2350 | Support for dictionary style in AMD vivado set_property constraints | 3.3.1 | Constraints can be specified as: set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS18 } [get_ports ETH1_MDC] |
| 2271 | Define connectors with an offset | 3.3.1 | The connector mapping now support simple expressions allowing to define offsets in connectors. |
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