| 2062 |
Crash in SystemVerilog parser after syntax error |
3.0.1 |
As title |
| 2057 |
VHDL linter CP14 false positive |
3.0.1 |
When a component instantiation contains a function in the formal part of a port association this is not recognized. |
| 2050 |
VHDL Lint check on range for an integer type |
3.0.1 |
Add a lint check that signal or variable using an integer/natural/positive has a range constraint. |
| 2036 |
Fuzzy parser does not detect end of package correctly |
3.0.1 |
If a package contains a package instantiation statement it is possible the end of the package is treated as the end of the package instantiation.
|
| 2030 |
Incorrect VHDL-1101 error message |
3.0.1 |
|
| 2025 |
Modelsim error reporting changed |
3.0.1 |
Some Modelsim errors have a changed format (string '(suppressible)' after the string '** Error') failing the error recognition. |
| 2022 |
VHDL linter does not report all Misc12 (signal has neither asynchrous reset nor initial value) cases |
3.0.1 |
Conditional signal assignments are not handled correctly. |
| 2019 |
VHDL linter CP 14 false positive |
3.0.1 |
False positive inside a procedure in a package. |
