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| SPR | Title | Released | Description |
|---|---|---|---|
| 2332 | Incorrect VERI-2486 message | 3.3.3 | Although typically tasks can’t be activated within functions, it is permissible to active them with in a fork..join_none per 13.4.4 in the 1800-2017 language reference. |
| 2327 | Verilog linter false positive (Misc4 on root module) | 3.3.3 | In rare cases the SystemVerilog root module for a file is empty. We should not issue a lint message for this. |
| 2326 | Import statement in an interface to recognized by fuzzy parser | 3.3.3 | Import statement inside a module was handled correctly, but an import statement inside an interface caused problems and the entire interface would be ignored. |
| 2322 | Underscore character not visible in generated HTM | 3.3.3 | In preformatted HTML code (like files) the underscore characters are not visible in the Windows browers. They do show on Linux Firefox. |
| 2313 | Not possible to specify license server using IPv6 address on Linux | 3.3.3 | Verification of the license file entry made it impossible to specify an IPv6 address in the license wizard. |
| 2308 | Incorrect fuzzy message on constant function argument | 3.3.2 | Constant arguments with an explicit type argument (ieee.numeric_std.signed) of a function definition within an architecture cause a fuzzy message. |
| 2304 | Alias statements seen as component declarations | 3.3.2 | Some alias statements on variables or signals are treated (and shown in the detailed view) as component instantiations. |
| 2298 | Import simulator script no longer works | 3.3.2 | Some Tcl functions are made read-only in the GUI part of HDLCompanion. |
| 2296 | Toolflow report does not show caption | 3.3.2 | Depending on how an HDL file is compiled with an external analyzer the log window caption is empty. |
| 2294 | Incorrect fuzzy messages about package not being found | 3.3.2 | Some package instantiations which use library 'work' are reported 'not found', while being present. |
| 2293 | VHDL package body files are not compiled with the toolflow. | 3.3.2 | Separate VHDL package body files do not appear in the list of files. |
| 2290 | SystemVerilog CP7 linter false positive | 3.3.1 | SystemVerilog built-in functions of queues where ignored. |
| 2279 | New lint checks | 3.3.1 | Implemented basic DO254 Safe Synthesis checks for SS8/SS9/SS10 (both in Verilog and VHDL): SS8: Avoid Clock Used as Data SS9: Avoid Shared Clock and Reset Signal SS10: Avoid gated clocks |
| 2275 | Incorrect (System)Verilog dependencies | 3.3.1 | When a selected name refers to an instance, but a module/interface with the same (primary) name is present an incorrect dependency to this module/interface is added. |
| 2207 | Retain selection in the browsers | 3.3.1 | After analyzing files the selection in the browser widgets is lost. |
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