HDL Works
SPR | Title | Released | Description |
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Device update | 5.1.6 |
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2337 | Cadence Allegro Skill interface issues | 5.1.5 | Netlist extraction failed on schematic pages. Wiring Allegro schematic pages failed in some flows. |
2333 | Not all voltage values of AMD Zynq UltraScale pins extracted | 5.1.4 | Voltage values extracted from the ..power_routed.rpt file are not propagated for the power pins of the Processor system. |
FPGA device updates | 5.1.3 |
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2324 | Altium extension fails when project directory is read-only | 5.1.2 | When the Altium PCB directory is readonly the PCB Xml netlist should be placed somewhere else. |
2313 | Not possible to specify license server using IPv6 address on Linux | 5.1.2 | Verification of the license file entry made it impossible to specify an IPv6 address in the license wizard. |
2307 | CSV export view is always below main application window | 5.1.2 | On MS Windows the CSV export view (usually Scriptum) of IO Checker or BoardTrace is always below the main app window when the export dialog is closed. |
FPGA Device updates | 5.1.2 |
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2303 | Wiring Allegro projects fails when spaces are in the directory path | 5.1.1 | The Skill wiring engine cannot cope with spaces in directory path to the project path. |
2302 | Direction icon missing in pinview | 5.1.1 | The signal direction is not extracted from the AMD Vivado pin report. |
2291 | Signal view filter fails | 5.1.1 | The signal view still shows vectorized signals when both filters Hide assigned signals and Hide LVDS negative signals are active. |
2281 | Schematic wiring ignores Intel signal names | 5.1.1 | Both Altium and Allegro wiring scripts still used old property name, which is now empty, and thus didn't wire symbols. |
2260 | Support for compressed Cadence Packager pstcmdb.dat file | 5.1.1 | The Allegro packaged netlist file 'pstcmd.dat' generated by version 17.2 has become a compressed file. |
2251 | No PCB data error issued when writing constraints file | 5.1.1 | When all signal constraints are correct you still get an error (and Yes/No dialog) when there is no PCB file present. |
2250 | Add a message dialog when opening a project created with an older version | 5.1.1 | To prevent changing/saving a modified project to a newer database format add a message dialog when opening a project using an older database format. Message can be disabled in the user preferences. |
2204 | Microsemi XML reports | 5.1.1 | support for Microsemi PolarFire/PolarFireSoc *_pinrpt_boardlayout.xml |
2174 | Extend Cadence Allegro wiring dialog with a port type | 5.1.1 | Allow to set an Allegro port type for each signal individually. |
2156 | Support CSV based wiring of power/ground in Altium Designer | 5.1.1 | Allow wiring of symbols based on CSV data. |
FPGA Device updates | 5.1.1 |
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