BoardTrace

Viewing connections between large components (including FPGAs and processors) on one or multiple PCBs

Complex electronic systems consist of one or more PCBs. They can be connected using a backplane, daughter boards and/or cables. Each schematic has to be manually checked for the correct signal names. Verifying interconnect between components on different boards is even more tedious. BoardTrace offers an easy and smart way to organize and view the schematic data.
Instead of comparing two lists with hundreds of pins for each connector manually, or browsing through a netlist file, you can load all the PCB netlist files in BoardTrace and define how boards are connected.

Netlist view

BoardTrace has an unique tabular netlist view which shows the netlist and selected (large) components (over multiple boards). The view (with the various sorting and filter options) makes it easy to see how components are connected.

Intelligent Verification

Quite often the signal names are different on the connected boards, but are correctly connected. BoardTrace uses rules (based on regular expressions) to match the signal names between PCBs. It allows the tool to validate groups of matches although individual signals can still differ. The rules can be generated automatically and be fine-tuned by the designer. The automated approach will often match 80% to 90% of all connector pins.

The flexibility of BoardTrace allows it to be used in any design flow and does not require any design methodology. The rule generator in combination with the sorted problem view allows engineers to validate large systems in a few hours.

Once the project and the connections between boards are defined it is a simple task to re-verify the connectivity when changes were made to the PCBs or FPGAs. All out-of-date files can be processed in one action.

FPGAs / processors

Any FPGA or processor present on a board can be visualized as (virtual) board based on information extracted from the pin report file (generated by your FPGA development tool), an constraint file or the processor CSV report file. This allows you to easily see how the IO signals of these configurable devices connect to the other boards and components in your system.